Towards Accelerating Intrusion Detection Operations at the Edge Network usin...

杨利霞

Towards Accelerating Intrusion Detection

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Operations at the Edge Network using FPGAs

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In the current paper, we present our work towards
/ Z# {2 l; k  p; Zaccelerating intrusion detection operations at the edge network
1 f( Y0 i9 g3 s, Q! ousing FPGAs. Cloud computing and network function
" k: |/ D, M- u; w3 W) Tvirtualization have led to a new appealing paradigm for service
delivery and management. Unfortunately, this paradigm fails
to correctly support IoT applications and services that seek
0 D" J, v0 I1 r$ G1 hbetter communication platforms. Security as a Service can also
be seen as a cloud-based model that needs to be accommodated
to fulfill these services requirements. Again, one of the main
+ e3 ~; o7 I7 @8 [issues to be addressed in this context is how to improve the
performance of such systems or services in order to make them
capable of coping with the huge amount of data while
7 _# H" k. p; h$ hremaining reliable. A potential solution is the FPGA based
7 m; `' J/ `# A7 m$ ~' Z5 D% ^edge computing, which is a powerful combination offering
0 V/ m3 P3 e' o  BFPGA acceleration capabilities together with edge and fog
3 k( E: Y. M4 f* _$ e/ Wbenefits. Indeed, our work focusses on devising an Intrusion
Prevention architecture called FORTISEC (40SEC), that is
meant to operate in a completely softwarized as well as in an
FPGA mode. Thereby, we present suitable algorithms, design
3 R6 e; `3 ?& `2 P) cprinciples and well defined components towards the
4 K0 w8 j0 z" A3 y8 c2 r8 k  Yimplementation of accelerated intrusion prevention on the
: G) R% O, w" ~+ n& t1 Uedge. We also present a testbed being utilized for the
" k: L* ^: B& }' Gimplementation of 40SEC and its performance testing.
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