Towards Accelerating Intrusion Detection Operations at the Edge Network usin...

杨利霞

Towards Accelerating Intrusion Detection

Operations at the Edge Network using FPGAs

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' e+ v9 B$ a3 |  \6 p In the current paper, we present our work towards
accelerating intrusion detection operations at the edge network
  s: L( \; }0 D& M5 i! g5 i  ?using FPGAs. Cloud computing and network function
virtualization have led to a new appealing paradigm for service
delivery and management. Unfortunately, this paradigm fails
4 U* l9 w. g4 _1 e" }) W0 ^$ ]2 Y5 ito correctly support IoT applications and services that seek
# ^2 i0 L8 r1 ]5 ?$ H& r& Jbetter communication platforms. Security as a Service can also
be seen as a cloud-based model that needs to be accommodated
- R: L/ j/ a/ u8 x% b$ Z: A# yto fulfill these services requirements. Again, one of the main
; D6 f/ y* [5 M+ j& wissues to be addressed in this context is how to improve the
6 P3 \6 W$ K0 i- z* }  ~performance of such systems or services in order to make them
capable of coping with the huge amount of data while
remaining reliable. A potential solution is the FPGA based
edge computing, which is a powerful combination offering
FPGA acceleration capabilities together with edge and fog
benefits. Indeed, our work focusses on devising an Intrusion
, t+ J( c) }+ `Prevention architecture called FORTISEC (40SEC), that is
- {( B& _% [2 ]; Mmeant to operate in a completely softwarized as well as in an
FPGA mode. Thereby, we present suitable algorithms, design
principles and well defined components towards the
implementation of accelerated intrusion prevention on the
- A$ @9 N! Y+ l3 F  |edge. We also present a testbed being utilized for the
implementation of 40SEC and its performance testing.
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