Towards Accelerating Intrusion Detection Operations at the Edge Network usin...

杨利霞

Towards Accelerating Intrusion Detection

Operations at the Edge Network using FPGAs

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* \. q4 W5 l. c4 T" Q: X; t% \ In the current paper, we present our work towards
accelerating intrusion detection operations at the edge network
using FPGAs. Cloud computing and network function
! [9 m, s0 V% {% \9 C9 Evirtualization have led to a new appealing paradigm for service
) B# {+ b8 A. S5 n8 Mdelivery and management. Unfortunately, this paradigm fails
' n4 N( i" M; |4 Ito correctly support IoT applications and services that seek
better communication platforms. Security as a Service can also
& Z$ y4 W) o7 @% S4 Y+ k" A5 x" Xbe seen as a cloud-based model that needs to be accommodated
6 M1 P8 Q- e5 t3 e' Mto fulfill these services requirements. Again, one of the main
issues to be addressed in this context is how to improve the
performance of such systems or services in order to make them
capable of coping with the huge amount of data while
9 C$ Q% w: p' Z' ]) D5 w3 ?' B* Q' p6 Bremaining reliable. A potential solution is the FPGA based
; @6 z& }8 v# Y: }edge computing, which is a powerful combination offering
+ j' w) G) T, y( {  k. [FPGA acceleration capabilities together with edge and fog
benefits. Indeed, our work focusses on devising an Intrusion
2 Q: ~1 i2 I7 ~- lPrevention architecture called FORTISEC (40SEC), that is
2 h8 t4 c) g! h3 |8 U7 i+ ?meant to operate in a completely softwarized as well as in an
FPGA mode. Thereby, we present suitable algorithms, design
principles and well defined components towards the
implementation of accelerated intrusion prevention on the
edge. We also present a testbed being utilized for the
implementation of 40SEC and its performance testing.

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