Towards Accelerating Intrusion Detection Operations at the Edge Network usin...

杨利霞

Towards Accelerating Intrusion Detection

5 Z3 q- _/ W! [- i: q% g3 q

Operations at the Edge Network using FPGAs

" Y9 w3 f: F4 M$ C, b2 \

5 V. B& e, P& L+ K2 R In the current paper, we present our work towards
accelerating intrusion detection operations at the edge network
# n* }4 U5 }( R' nusing FPGAs. Cloud computing and network function
% X2 \3 h9 B3 C* ^virtualization have led to a new appealing paradigm for service
( @6 e* t8 A# e4 i6 V/ ldelivery and management. Unfortunately, this paradigm fails
to correctly support IoT applications and services that seek
2 q4 d* W( x5 h8 F" \: T, p) ubetter communication platforms. Security as a Service can also
be seen as a cloud-based model that needs to be accommodated
to fulfill these services requirements. Again, one of the main
issues to be addressed in this context is how to improve the
performance of such systems or services in order to make them
2 x; w# q* `) [; O' Tcapable of coping with the huge amount of data while
1 i7 c3 t; r' H4 L+ Aremaining reliable. A potential solution is the FPGA based
edge computing, which is a powerful combination offering
, H9 h  r9 Z' A% RFPGA acceleration capabilities together with edge and fog
6 c+ E$ V, g& f6 g# l8 S  Kbenefits. Indeed, our work focusses on devising an Intrusion
3 Z8 P" C2 s3 ^% t& F7 y4 y* [Prevention architecture called FORTISEC (40SEC), that is
meant to operate in a completely softwarized as well as in an
FPGA mode. Thereby, we present suitable algorithms, design
2 q7 [7 `# e  O$ v* R0 F) eprinciples and well defined components towards the
) O4 K  w# _2 A9 o  e8 f9 w2 Limplementation of accelerated intrusion prevention on the
! k% k. z+ o0 P2 M9 ^3 hedge. We also present a testbed being utilized for the
implementation of 40SEC and its performance testing.
/ G* h  M" E) F3 c5 e

- N" Z+ ?. D! b: j6 O1 G