Towards Accelerating Intrusion Detection Operations at the Edge Network usin...

杨利霞

Towards Accelerating Intrusion Detection

" M6 x- m" w. L3 |

Operations at the Edge Network using FPGAs

# P; u( I" N3 q8 A; d
/ F  a4 O* C1 c) w3 B- j1 B+ t5 ` In the current paper, we present our work towards
accelerating intrusion detection operations at the edge network
; ~/ h9 n) Q: N; ^) w# |! h* musing FPGAs. Cloud computing and network function
virtualization have led to a new appealing paradigm for service
delivery and management. Unfortunately, this paradigm fails
5 Y$ p6 t. r7 ]9 v6 h& |to correctly support IoT applications and services that seek
better communication platforms. Security as a Service can also
* g0 q6 R1 A* _be seen as a cloud-based model that needs to be accommodated
to fulfill these services requirements. Again, one of the main
$ t; I+ c5 c, e9 U: M# Pissues to be addressed in this context is how to improve the
+ f+ I1 E6 H5 Jperformance of such systems or services in order to make them
capable of coping with the huge amount of data while
remaining reliable. A potential solution is the FPGA based
edge computing, which is a powerful combination offering
FPGA acceleration capabilities together with edge and fog
benefits. Indeed, our work focusses on devising an Intrusion
/ L0 m5 S/ o9 e: X. m0 L5 rPrevention architecture called FORTISEC (40SEC), that is
meant to operate in a completely softwarized as well as in an
FPGA mode. Thereby, we present suitable algorithms, design
principles and well defined components towards the
implementation of accelerated intrusion prevention on the
edge. We also present a testbed being utilized for the
7 [8 T2 B* r5 }! D$ }( Fimplementation of 40SEC and its performance testing.