Towards Accelerating Intrusion Detection Operations at the Edge Network usin...

杨利霞

Towards Accelerating Intrusion Detection

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Operations at the Edge Network using FPGAs

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In the current paper, we present our work towards
accelerating intrusion detection operations at the edge network
using FPGAs. Cloud computing and network function
8 I( O8 E, b6 T' h  Dvirtualization have led to a new appealing paradigm for service
delivery and management. Unfortunately, this paradigm fails
to correctly support IoT applications and services that seek
better communication platforms. Security as a Service can also
be seen as a cloud-based model that needs to be accommodated
1 w4 B( h& S- xto fulfill these services requirements. Again, one of the main
" V% [* R0 O$ u, \( i. ~issues to be addressed in this context is how to improve the
: ?; F& C- d: M% d$ H! _performance of such systems or services in order to make them
capable of coping with the huge amount of data while
0 a, }1 B6 S$ i5 P  c0 O7 Aremaining reliable. A potential solution is the FPGA based
1 B5 X3 b; M8 w1 cedge computing, which is a powerful combination offering
- _. d2 n9 L$ \* L0 hFPGA acceleration capabilities together with edge and fog
benefits. Indeed, our work focusses on devising an Intrusion
+ c7 i! }# q1 Q$ [! D. kPrevention architecture called FORTISEC (40SEC), that is
9 V3 d9 `  d# p: j' f3 B2 gmeant to operate in a completely softwarized as well as in an
FPGA mode. Thereby, we present suitable algorithms, design
principles and well defined components towards the
implementation of accelerated intrusion prevention on the
edge. We also present a testbed being utilized for the
implementation of 40SEC and its performance testing.